Computer Science (AS & A Level) · May / June 2025 · Paper 13 · Question 5

The following table shows part of the instruction set for a processor. The processor has two registers: the Accumulator (ACC) and an Index Register (IX). Instruction Explanation Opcode Operand LDM #n Immediate addressing. Load the number n to ACC STO <address> Store the contents of ACC at the given address ADD #n/Bn/&n Add the number n to the ACC ADD <address> Add the contents of the given address to the ACC SUB <address> Subtract the contents of the given address from the ACC SUB #n/Bn/&n Subtract the number n from the ACC DEC <register> Subtract 1 from the contents of the register (ACC or IX) JMP <address> Jump to the given address CMP <address> Compare the contents of ACC with the contents of <address> CMP #n Compare the contents of ACC with number n JPE <address> Following a compare instruction, jump to <address> if the compare was True END Return control to the operating system ACC denotes Accumulator <address> can be an absolute or a symbolic address # denotes a denary number, e.g. #123 B denotes a binary number, e.g. B01001010 & denotes a hexadecimal number, e.g. &4A

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