Computer Science (AS & A Level) · Oct / Nov 2023 · Paper 12 · Question 9

The following table shows part of the instruction set for a processor. The processor has two registers, the Accumulator (ACC) and the Index Register (IX). Instruction Explanation Opcode Operand LDD <address> Direct addressing. Load the contents of the location at the given address to ACC LDX <address> Indexed addressing. Form the address from <address> + the contents of the index register. Copy the contents of this calculated address to ACC LDR #n Immediate addressing. Load the number n to IX STO <address> Store the contents of ACC at the given address ADD #n Add the denary number n to the ACC JMP <address> Jump to the given address INC <register> Add 1 to the contents of the register (ACC or IX) CMP <address> Compare the contents of ACC with the contents of <address> CMI <address> Indirect addressing. The address to be used is at the given address. Compare the contents of ACC with the contents of this second address JPE <address> Following a compare instruction, jump to <address> if the compare was True IN Key in a character and store its ASCII value in ACC OUT Output to the screen the character whose ASCII value is stored in ACC END Return control to the operating system <address> can be an absolute or a symbolic address # denotes a denary number, e.g. #123

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