Computer Science (AS & A Level) · May / June 2021 · Paper 12 · Question 4

The table shows part of the instruction set for a processor. The processor has one general purpose register, the Accumulator (ACC), and an Index Register (IX). Instruction Explanation Opcode Operand LDM #n Immediate addressing. Load the number n to ACC LDD <address> Direct addressing. Load the contents of the location at the given address to ACC STO <address> Store contents of ACC at the given address ADD <address> Add the contents of the given address to the ACC INC <register> Add 1 to the contents of the register (ACC or IX) DEC <register> Subtract 1 from the contents of the register (ACC or IX) CMP <address> Compare the contents of ACC with the contents of <address> JPE <address> Following a compare instruction, jump to <address> if the compare was True JPN <address> Following a compare instruction, jump to <address> if the compare was False JMP <address> Jump to the given address IN Key in a character and store its ASCII value in ACC OUT Output to the screen the character whose ASCII value is stored in ACC END Return control to the operating system denotes a denary number, e.g. #123 The current contents of the main memory and selected values from the ASCII character set are: Address Instruction ASCII code table (selected codes only) 70 IN ASCII code Character 71 CMP 100 65 A 72 JPE 80 66 B 73 CMP 101 67 C 74 JPE 76 68 D 75 JMP 80 76 LDD 102 77 INC ACC 78 STO 102 79 JMP 70 80 LDD 102 81 DEC ACC 82 STO 102 83 JMP 70 … 100 68 101 65 102 100

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